FIG. 9 shows a block diagram illustrating a conventional filter circuit. In FIG. 9, conventional filter circuit 1 includes, e.g. first-order passive filter 2, second-order active filter 3, second-order active filter 4, and second-order active filter 5. These filters are sequentially connected in series in this order.
A conventional receiver (not shown) employing a foregoing steep seventh-order filter circuit allows obtaining quality reception even when an interference wave exists in a frequency band adjacent to a desired frequency band. Non-patented document 1 is known as related art to the present invention.
However, the receiver employing the conventional filter circuit discussed above consumes a large amount of power when no interference wave exits in the adjacent frequency band because active filters 3, 4, 5 are kept turning on.    Non-patented document 1: “Primer of CMOS Analog Circuit” (p 225-p 258) published on Jan. 1, 2005 by CQ publishing Co. Ltd, and written by Mr. Kenji Taniguchi